Test Chip Engineer
Shift: 8:00AM - 5:00PM
(Monday - Friday)
****This role will be remote in any of the following Locations: AZ, OR, SC, TX (Virtual)
CDNS/SNPS Tool suites: Synthesis, APR, Timing convergence (STA), 5-10 yrs experience (BS with exp or MS), Fusion complier, Innovus, Genus, backend guy, physical design.
You will be working as part of a team supporting RTL synthesis and place and route experiments using internal and external vendor tools to improve our company's product Power, Performance, and Area, for existing and future process nodes on internal Intel Architecture (IA/X86) and external ARM IP's.
You will be specifically expected to deal with changes to floorplan, corresponding scaling and its impact to power, performance, debug scaling and timing issues for the present tech node and predict how it would impact scaling, timing, and power for the next tech node, improve cell utilization and transistor density metrics and keep pushing the power, performance envelope through critical path analysis, metal layer usage by the tool, etc.
- Master Science in Electrical Engineering, Computer Engineering with 5 years of industry experience OR PhD in Electrical Engineering, Computer Engineering.
Job Types: Full-time, Contract
Pay: $45.00 per hour
- Dental insurance
- Health insurance
- Vision insurance
- 8 hour shift
- Day shift
- Are you allowed to work in the United States without sponsorship?
- Master's (Required)
Work Location: Remote
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